1. Cross-Reference to the Related Applications
This application is based on application No.2000-222481 filed Jul. 24, 2000 in Japan, the content of which is incorporated hereinto by reference.
2. Field of the Invention
The invention relates to a method of producing a semiconductor device and, more particularly, to a method capable of forming a uniform SOG coating film. The present invention also relates to a system for producing the same.
3. Description of the Related Art
With the progress of microfabrication of integrated circuits in the process dealing with semiconductor wafer, increase in number and complexity of multilayered wirings have brought about a problem associated with formation of steps on interlayer dielectric films, accompanied by increase of the risk of the wires being burn out. Therefore, an SOG layer, that is, a layer formed by the use of the SOG (Spin on Glass) technique has come to be formed on the interlayer dielectric film to render the interlayer dielectric film to be substantially flat.
FIG. 4 is a schematic sectional view of a semiconductor device having a multilayered wirings, in which the interlayer dielectric film has been rendered flat by the use of the SOC layer. In this figure, reference numeral 101 is a semiconductor substrate made of, for example, silicon, reference numerals 110 and 112 are a respective interlayer wiring conductor, reference numeral 102 is interlayer dielectric structure, and reference numeral 111 is a via hole. The interlayer dielectric structure 102 includes a first insulating layer 103, a SOG layer 104 and a second insulating layer 105.
A conventional semiconductor device has been manufactured by the following method. The wiring conductors 110 are first formed on the semiconductor substrate 101. The first insulating layer 103 made of silicon oxide is formed on the semiconductor substrate 101 by the use of plasma CVD technique so as to cover the wiring conductors 110. A coating solution containing materials for use in the practice of the SOG technique is then applied on the surface of the first insulating layer 103, opposite to the substrate 101, by the use of a spin coating method thereby to form SOG coating film. The materials generally used in the practice of the SOG technique includes inorganic SOG material, such as hydrogen silsesquioxane, or organic SOG, such as polymethylsiloxane.
Then, the resultant SOG coating film overlaying the first insulating layer 103 is fired under an oxidizing atmosphere thereby to complete the SOG layer 104 made of silicon oxide. Thereafter, the second insulating layer 105 made of silicon oxide is formed over the SOG layer 104 by the use of a plasma CVD technique, thereby completing the interlayer dielectric structure 102 made up of the first insulating layer 103, the SOG layer 104 and the second insulating layer 105.
A photoresist layer having with a perforation that eventually defines the via hole 111 is then formed on the interlayer dielectric structure 10 by means of lithography. A portion of the interlayer dielectric structure 102 aligned with the perforation of the photoresist is subsequently dry-etched off, leaving the via hole 111 that extends to the wiring conductor 110. After the formation of the via hole 111, the photoresist layer is removed, followed by deposition of a wire material on the interlayer dielectric struture 102 so that the via hole 111 can be filled up. The material so deposited is then patterned by preferential dry etching, thereby forming the wiring conductor 112 through the via hole 111.
However, it has been found that when the insulating layer 103 is exposed to the elevated temperature evolved by generation of plasma in the CVD reactor or is subjected to a heat treatment, the surface of the insulating layer 103 to become hydrophobic. Also, there is another problem in that contaminants, such as, silicon, hydrogen, and/or nitrogen, which are unreacted materials at the time of depositing silicon oxide layer by the plasma CVD technique, or organic materials are deposited on the surface of the insulating layer 103. These problems amount to difficulty in wetting the insulating layer 103 with the coating solution containing the SOG materials which eventually results in the non uniformity of the SOG coating film. Thus, the flatness of the interlayer dielectric layer is lowered, which in turn results in collapse of the via hole and the short-circuiting between the wiring conductors during formation of the via hole and/or the wiring conductors.
In order to substantially eliminate these problems, some methods have been suggested. For example, Japanese Patent Laid-open Publication No. 11-251312 discloses the method of making the insulating layer 103 hydrophilic by means of oxygen plasma treatment, and Japanese Patent Laid-open Publication No. 11-162965 and No. 11-87337 disclose the method of removing the contaminants with ozone through the UV irradiation treatment. Japanese Patent Laid-open Publication No. 5-226482 discloses the use of a combination of a heating treatment, an oxygen plasma treatment and an UV irradiation treatment.
However, these prior art methods are ineffective to provide the hydrophilic surface. It is therefore desired to provide the method that is capable of reducing the nonuniformity of the SOG coating film. It is also desired to provide the method that is simple and less time-consuming in order to reduce the processing cost.
An object of the present invention is therefore to provide a method of producing the semiconductor device, which is simple and less time-consuming and, also, capable of suppressing the nonuniformity in thickness of the SOG coating film.
It is an another important object of the present invention to provide a system of producing the semiconductor device of the kind referred to above.
In order to achieve the object described above, the method of producing a semiconductor device of the present invention includes the steps of patterning a wiring conductor on a semiconductor substrate, forming an insulating layer on the semiconductor substrate so as to cover the wiring conductor, performing a wet-etching process subject to the insulating layer on the semiconductor substrate to increase a wettability thereof and applying a coating solution containing SOG materials on an entire surface of the insulating layer to form an SOG that compensates for surface irregularities appearing on one of opposite surfaces of the insulating layer.
In the method of the present invention, the insulating layer is subjected to wet etching prior to the formation of SOG layer, thereby removing the contaminants such as silicon oxide that is deposited on the surface of the insulating layer. At that time, Sixe2x80x94Oxe2x80x94Si bonding which constitutes a cause of the hydrophobic surface of the insulating layer is removed. The contaminants of organic materials deposited on the surface of the insulating layer are also removed. Accordingly, the surface of the insulating layer can exhibit a hydrophilic character, so that the surface of the insulating layer can easily be wetted with the coating solution, and the nonuniformity of the SOG coating film can be thereby suppressed.
Furthermore, the wet etching can be carried out by, for example, dipping in the etching solution the semiconductor substrate having the insulating layer. Accordingly, the wet etching makes the etching process to be simple and less time-consuming.
Also according to the present invention, the method may include the step of heating the semiconductor substrate at a temperature within the range of 100 to 500xc2x0 C. after the insulating layer has been wet-etched.
Also according to the present invention, hydrogen fluoride solution may be employed in the wet etching step as an etching solution.
Also according to the another aspect of the present invention, there is provided a method including the steps of patterning a wiring conductor on a semiconductor substrate, forming an insulating layer on the semiconductor substrate so as to cover the wiring conductor, bringing the insulating layer into contact with a hydrophilic solvent to increase a wettability thereof and applying a coating solution containing SOG materials on an entire surface of the insulating layer to form an SOG that compensates for surface irregularities appearing on one of opposite surfaces of the insulating layer remote from the semiconductor substrate.
According to this method, contaminants, such as the organic materials, depositing on the surface of the insulating layers can be dissolved or flowed away in contact with the hydrophilic solvent and can therefore be removed from the surface of the insulating layer. Thus, the surface of the insulating layer is rendered to be hydrophilic and, hence, has a wettability to the coating solution. This makes it possible to suppress the nonuniformity of the SOG coating film. Furthermore, a simple operation such as contacting the insulating layer with the hydrophilic solvent can make the process to be simple and less time-consuming.
The hydrophilic solvent that can be employed in the practice of the present invention may be selected from the group consisting of methyl alcohol, ethyl alcohol, n-propyl alcohol and isopropyl alcohol.
The present invention also provides a system including a pretreatment section for treating a surface of an insulating layer formed on a semiconductor substrate having a patterned wiring conductor thereon, a SOG coating section for applying a coating solution to an entire surface of the insulating layer to form a SOG coating film, a SOG treatment section for firing the SOG coating film, and a transport apparatus for carrying the semiconductor substrate from the pretreatment section to the SOG coating section and further to the SOG treatment section. The pretreatment section referred to above includes at least one of a wet etching section and a solvent treatment section.
Also according to the present invention, the wet etching section may include an etching vessel containing an etching solution for etching the insulating layer, a wash vessel positioned adjacent the etching vessel for removing the etching solution from the semiconductor device having the insulating layer thereon, and an oven positioned adjacent the wash vessel for drying the semiconductor device having the insulating layer thereon.
The solvent treatment section may include a rotary coating apparatus having a rotating stage for placing the semiconductor device having the insulating layer thereon, and solvent supply apparatus for supplying the solvent onto the surface of the insulating layer.
The pretreatment section may also include at least one of a generator for oxygen plasma and an ultra-violet irradiator.
The transport section may include a carrier rail, a transport apparatus supported movably along the carrier rail, and a supporting apparatus for supporting the semiconductor device then attached to the transport apparatus for movement up and down.
The supporting apparatus may include a hanging arm connected to the carrier for movement up and down with, a supporting member for supporting a peripheral portion of the semiconductor device then rotatably attached to the hanging arm, a holding pad mounted on one end portion of the supporting member, and a connecting member for connecting the hanging arm to the supporting member.